Faculty Profile

Mr. Noble G
Assistant Professor (Special Grade)


Mr. Noble G holds an M. Tech in VLSI Design from Vellore Institute of Technology [VIT University] (2014) and a B.Tech in Electronics and Communication Engineering from Viswajyothi College of Engineering And Technology, Vazhakulam (2012). Commencing his role as an Assistant Professor at FISAT on 7th August 2014, he is currently pursuing a PhD in VLSI Architectures from the Indian Institute of Information Technology (IIIT), Kottayam, an Institute of National Importance (INI).

Mr. Noble G is a lifetime member of ISTE and an active member of IEEE. His areas of expertise include Digital VLSI Design, FPGA, and RTL Design.

Educational Qualification

1 2021 to present Ph.D.(VLSI) Indian Institute of information Technology[IIIT],Kottayam IIIT Kottayam
2 2012-2014 M.TECH


Vellore Institute of Technology [VIT University] VIT University
3 2008-2012 B.TECH


Viswajyothi College of Engineering & Technology,


M.G University,



Assistant Professor at Federal Institute of Science and Technology [FISAT], Angamaly since August 2014

Awards and honours

  • M.Tech First rank in VLSI Design from Vellore Institute of Technology [VIT University]


  • Winner of the Regional Rural Innovators Meet organized by the Kerala state council for science, technology and environment in December 2023


  • Reviewer for the IEEE International conferences on smart technologies for power and renewable energy


  • Honoured to present the idea of an ‘FPGA-based Cloud Detection Solution’ in front of experts from Vikram Sarabhai Space Centre (VSSC), Liquid Propulsion Systems Centre (LPSC), ISRO Inertial Systems Unit (IISU), and the Indian Institute of Space Science & Technology (IIST)


  • Honoured to demonstrate the open-source processor design tools at the ACM India Summer School on HPC and AI Compute Continuum held at IIT Palakkad


  • Winner of the IDEATe competition conducted by the Kerala Start-up Mission in 2023


  • Recipient of the VLSID-2023 Fellowship

Reviewer for the IEEE 19th India Council International Conference [INDICON2022]

Professional body memberships

Professional body memberships:


ISTE Lifetime Member

IEEE Member

Research & Publications

  1. Area of interest:Digital VLSI Design/RTL Design/FPGA


    • Noble G, Nalesh S and Kala S, “Bit-Flip Attack Detection for Secure Sparse Matrix Computations on FPGA” 19th IEEE Asia-Pacific Conference on Circuits and Systems –(APCCAS 2023), November 202 .
    • Rahul Barnwal, Noble G, Rajesh Kedia, Kala S and Nalesh S, “Leveraging PolarFire SoC for heartbeat classification using convolutional neural network”, Asia-Pacific Conference On Postgraduate Research In Microelectronics And Electronics (PRIMEAsia 2023), November 2023.
    • Noble, G., S. Nalesh, and S. Kala. “MOSCON: Modified Outer Product based Sparse Matrix-Matrix Multiplication Accelerator with Configurable Tiles.” 2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID). IEEE, 2023.
    • Noble, G., S. Nalesh, and S. Kala. “Accelerators for Sparse Matrix-Matrix Multiplication: A Review.” 2022 IEEE 19th India Council International Conference (INDICON). IEEE, 2022.
    • Sundararajan, S., Madhusoodanan, K.N., Abudhahir, A. and Noble, G., 2022, April. Implementation and Analysis of an Evolutionary Optimized Non-Linear Function for Linearization of Thermo-Resistive Sensors. In 2022 6th International Conference on Devices, Circuits and Systems (ICDCS) (pp. 74-79). IEEE.
    • Sundararajan, S., Kottarthil Naduvil, M., Abudhahir, A., Karuna, K.G. and Noble, G., 2022. Synthesis and study of evolutionary optimised sensor linearisation with translinear & FPGA circuits. International Journal of Electronics109(4), pp.699-720.
    • Noble, G , Implementation of Pipelined Out Of Order Queue Processor Architecture

    International Journal of Research in Engineering and Applied Science (ISSN 2249-3905), Volume 5, Issue 9, September 2015

    • Noble, G, Direct Digital Frequency Synthesizer Based On CORDIC Algorithm

    International journal of Innovative Research in Computer and Communication Engineering (ISSN (Online): 2320-9801, ISSN (Print): 2320-9798), Volume 3, Issue 8, August 2015.

    • Noble, G. and Sakthivel, S.M., 2013, April. A novel flip-flop design for low power clocking system. In 2013 International Conference on Communication and Signal Processing (pp. 627-631). IEEE.

    Patents Published/Applied

    • Efficient Bed veil tensioning system

    Number: 202341067063

    • Low cost firewood stove

    Number: 202341062204

    • Virtual Invigilator: Device to prevent malpractices in online examination.

    Number: 202341012276 A


    Number: (202141013010)

    • Smart Soldering Iron

    Number: 202141026311

FDPs/Trainings attended

Activity Institution Period
Two- week ISTE Workshop on Control Systems FISAT 2 – 12 December 2014
Three day workshop on VLSI system Design Rajagiri School of Engineering 16/12/2014-18/12/2014
Workshop on LaTex FISAT 6/01/2016
Two week FDP on CMOS,Mixed signal and radio frequency VLSI Design FISAT

Conducted by IIT Kharagpur

Workshop on Raspberry pi SNGIST
One day FDP on IoT-Trends and Challenges ECE Department, FISAT 04/12/2018
3 day course in Transactional Analysis FISAT 05/12/2018-07/12/2018
One Day FDP on Tools to aid online and blended learning ECE Department, FISAT 12/12/2018
3 day faculty development Programme on Tools to aid online and blended learning ISTE Chapter, FISAT 8,9,16/07/2019
FDP on Industry 4.0- Technological advances and implications Adi Shankara Institute of Engineering and Technology Kalady 17/05/2019-21/05/2019
An introduction to computer vision and Deep learning AWH engineering College 7/29/2020
An introduction to computer vision and Deep learning AWH engineering College 7/29/2020
Exploring Indian space technology Amaljyothi Engineering College 7/24/2020
Introduction to MEMS Engineering,Musaliar
College of Engineering
Intellectual Property rights FISAT 1/16/2021
Recent Trends in image processing College of Engineering Vadakara 25/03/2021 – 27/03/2021
5G Technologies and IoT GEC palakkad 15/03/2021 – 19/03/2021
Big Data in IoT College of Enginnering Karunagappaly 08/02/2021-12/02/2021
Internet of Things (IoT) AICTE Training And Learning (ATAL) Academy 01-02-2021 – 05-02-2021
Machine Learning and Optimization Phase II Ahalia School of Engineering 22-03-2021 -27-03-2021

Resource Person

Event Name
Workshop on Overview of IoT projects and use case
workshop on Free Simulation Software’s and PCB Design
Workshop on VLSI Design flow and Chip design
Evening workshop on embedded system design
Two day workshop on PIC microcontroller and PCB design
Two day Workshop on Arduino board and robotics
Workshop on MEMS
Four day workshop on robotics
Five day workshop on robotics and IoT
Five Days FDP on Robotics and IoT
Embedded System Design Based on arduino Board

Projects Guided

  • Bore well Rescue Robot
  • Humanoid Robot
  • FPGA Based Video game
  • Home automation using artificial Intelligence
  • Resistor Sorting
  • Signature verification using neural network with OpenCV
  • Swarm Robotics
  • FISAT Traffic Controller System
  • FISAT late comer identification using face recognition
  • Vending machine for fisat store
  • Teleprompter
  • Expresso Machine
  • PCB plotter
  • Black Board cleaner
  • Classroom and canteen automation
  • Coin operated Mobile Recharging Station
  • V2V Communication
  • Automatic Watering system
  • Obstacle avoidance robot
  • GSM based locker system
  • Bus Location Messenger
  • Hidden active cellphone detector
  • Target advertisement system
  • Rolling Electronic Display
  • Heart beat monitoring system
  • Android controlled robot
  • Anti-tilting boat security system
  • Pick and place robot
  • Cashless campus
  • Image processing using FPGA
  • Gate pass issue using rpi
  • Library Automation
  • Fast walkthrough Gateway
  • Automated bed veil system
  • Implementation of Modern arithmetic’s in FPGA
  • Health monitoring using FPGA
  • Robotic arm using FPGA

Courses offered

CMOS Design M.Tech -VLSI Design
Embedded System Hardware Architecture M.Tech -VLSI Design
VLSI Design Lab M.Tech -VLSI Design
ASIC Design M.Tech -VLSI Design
MEMS M.Tech -VLSI Design
Nano-Electronics B.Tech
Digital System Design B.Tech
Programing in C B.Tech
Microcontroller Lab B.Tech
Mini Project & Major Project B.Tech


Room  – South Block (SB 304)


Contact Email: nobleg@fisat.ac.in