Assistant Professor at Federal Institute of Science and Technology [FISAT], Angamaly since August 2014

• M.Tech First rank in VLSI Design from Vellore Institute of Technology [VIT University]

• Winner of the Regional Rural Innovators Meet organized by the Kerala state council for science, technology and environment in December 2023

• Reviewer for the IEEE International conferences on smart technologies for power and renewable energy

• Honoured to present the idea of an ‘FPGA-based Cloud Detection Solution’ in front of experts from Vikram Sarabhai Space Centre (VSSC), Liquid Propulsion Systems Centre (LPSC), ISRO Inertial Systems Unit (IISU), and the Indian Institute of Space Science & Technology (IIST)

• Honoured to demonstrate the open-source processor design tools at the ACM India Summer School on HPC and AI Compute Continuum held at IIT Palakkad

• Winner of the IDEATe competition conducted by the Kerala Start-up Mission in 2023

• Recipient of the VLSID-2023 Fellowship

Reviewer for the IEEE 19th India Council International Conference [INDICON2022]

Professional body memberships:

ISTE Lifetime Member

IEEE Member

1. Area of interest:Digital VLSI Design/RTL Design/FPGA

   Publications

   • Noble G, Nalesh S and Kala S, “Bit-Flip Attack Detection for Secure Sparse Matrix Computations on FPGA” 19th IEEE Asia-Pacific Conference on Circuits and Systems –(APCCAS 2023), November 202 .
   • Rahul Barnwal, Noble G, Rajesh Kedia, Kala S and Nalesh S, “Leveraging PolarFire SoC for heartbeat classification using convolutional neural network”, Asia-Pacific Conference On Postgraduate Research In Microelectronics And Electronics (PRIMEAsia 2023), November 2023.
   • Noble, G., S. Nalesh, and S. Kala. “MOSCON: Modified Outer Product based Sparse Matrix-Matrix Multiplication Accelerator with Configurable Tiles.” 2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID). IEEE, 2023.
   • Noble, G., S. Nalesh, and S. Kala. “Accelerators for Sparse Matrix-Matrix Multiplication: A Review.” 2022 IEEE 19th India Council International Conference (INDICON). IEEE, 2022.
   • Sundararajan, S., Madhusoodanan, K.N., Abudhahir, A. and Noble, G., 2022, April. Implementation and Analysis of an Evolutionary Optimized Non-Linear Function for Linearization of Thermo-Resistive Sensors. In 2022 6th International Conference on Devices, Circuits and Systems (ICDCS) (pp. 74-79). IEEE.
   • Sundararajan, S., Kottarthil Naduvil, M., Abudhahir, A., Karuna, K.G. and Noble, G., 2022. Synthesis and study of evolutionary optimised sensor linearisation with translinear & FPGA circuits. International Journal of Electronics, 109(4), pp.699-720.
   • Noble, G , Implementation of Pipelined Out Of Order Queue Processor Architecture

   International Journal of Research in Engineering and Applied Science (ISSN 2249-3905), Volume 5, Issue 9, September 2015

   • Noble, G, Direct Digital Frequency Synthesizer Based On CORDIC Algorithm

   International journal of Innovative Research in Computer and Communication Engineering (ISSN (Online): 2320-9801, ISSN (Print): 2320-9798), Volume 3, Issue 8, August 2015.

   • Noble, G. and Sakthivel, S.M., 2013, April. A novel flip-flop design for low power clocking system. In 2013 International Conference on Communication and Signal Processing (pp. 627-631). IEEE.

   Patents Published/Applied

   • Efficient Bed veil tensioning system

   Number: 202341067063

   • Low cost firewood stove

   Number: 202341062204

   • Virtual Invigilator: Device to prevent malpractices in online examination.

   Number: 202341012276 A

   • IOT BASED CHAIR/COT USAGE DETECTOR

   Number: (202141013010)

   • Smart Soldering Iron

   Number: 202141026311

• Kerala Start-up Mission Innovators Grant

Project Title: Smart Soldering Iron

Sanctioned Year: 2022

• Centre for Engineering Research and Development[CERD] Grant by APJ Abul Kalam Technological University.

Project Title: Fast walkthrough gateway

Sanctioned Year: 2021

• Project grant from Kerala State Council for Science and Technology [KSCSTE]

Project Title: Face Mask Detection System

Sanctioned Year: 2021

• Project grant from Kerala State Council for Science and Technology [KSCSTE]

Project Title: Bore well Rescue Robot

Sanctioned Year: 2019

• Bore well Rescue Robot
• Humanoid Robot
• FPGA Based Video game
• Home automation using artificial Intelligence
• Resistor Sorting
• Signature verification using neural network with OpenCV
• Swarm Robotics
• FISAT Traffic Controller System
• FISAT late comer identification using face recognition
• Vending machine for fisat store
• Teleprompter
• Expresso Machine
• PCB plotter
• Black Board cleaner
• Classroom and canteen automation
• Coin operated Mobile Recharging Station
• V2V Communication
• BOOLEAN ALGEBRA CALCULATOR
• Automatic Watering system
• Obstacle avoidance robot
• GSM based locker system
• Bus Location Messenger
• Hidden active cellphone detector
• Target advertisement system
• Rolling Electronic Display
• Heart beat monitoring system
• Android controlled robot
• Anti-tilting boat security system
• Pick and place robot
• Cashless campus
• Image processing using FPGA
• Gate pass issue using rpi
• Library Automation
• Fast walkthrough Gateway
• Automated bed veil system
• Implementation of Modern arithmetic’s in FPGA
• Health monitoring using FPGA
• Robotic arm using FPGA

Room  – South Block (SB 304)

Contact Email: nobleg@fisat.ac.in