Mrs. Vinitha.V completed her B .E in Electronics & Communication Engineering from V.L.B.JCET, Coimbatore and M Tech in Electronics Engineering with specialization in VLSI and Embedded Systems from Govt. Model Engineering College, Thrikkakara. She started her career as an Applications Engineer at MAXSOFT, Bangalore in MAY 11th 2002 which was mainly into research and analysis using CAE tools in the field of electrical machines and electromagnetic for various DRDO and research organisations. She joined Amrita Vishwa Vidya Peetham, Ettimadai as Lecturer from August 2004 to November 2006. After a brief span of working in SCMS, Karukutty ,She joined FISAT as Lecturer in May 2007.
Over a period of time, she has taught various subjects including Basic Electronics Engineering, Electronic Circuits and Devices, Solid state Devices Network Theory, Digital System Design, Microprocessors, Microcontrollers, VLSI Design, Electromagnetic theory,TV and Radar Engineering. She is a lifetime member of ISTE.She is currently pursuing her Phd under KTU in FISAT in VLSI .
| Degree |
Specialization |
Institute |
University |
Year of completion |
| PhD |
VLSI |
FISAT |
KTU |
|
| M.Tech |
VLSI & ES |
Model Engineering College |
CUSAT |
2012 |
| B.Tech |
ECE |
V.L.B JCET |
Bharathiar University |
2002 |
| Designation |
Institution |
from(year) |
To(year) |
| Assistant Professor (Senior Grade) |
FISAT |
2025 |
Till date |
| Assistant Professor |
FISAT |
2012 |
2025 |
| Lecturer |
FISAT |
2007 |
2012 |
| 1 |
Patent granted for design of automated bitter gourd harvesting Device on 2025 |
| 2 |
Secured E(Elite grade) in NPTEL online exam for three subjects |
| 3 |
Secured 96.7% in Coursera Programming for Everybody (Getting Started with Python) |
-
| (a) |
Present Responsibilities |
| 1 |
Group Advisor |
| 2 |
Executive member of KTU audit group |
| 3 |
Member of Discipline committee |
| (b) |
Past Responsibilities |
| 1 |
Member of iqac |
| 2 |
Magazine in charge |
| 3 |
IEEE in charge |
| 4 |
Executive member of ECHO |
| 1 |
ISTE Life time membership |
|
Papers in Journals |
| 1 |
Computer Aided Detection of skin cancer Detection from Lesion images via Deep learning technique,https://www.ijraset.com/research-paper/computer-aided-detection-of-skin-cancer-detection-from-lesion-images |
| 2 |
Cervical Cancer Detection through UNet++ with Pixel2pixel Generator from Pap smear Images,https://www.ijceronline.com/papers/Vol13_issue3/B13030613.pdf |
| 3 |
Computer-Aided Detection of Skin Cancer Detection from Lesion Images Via Deep Learning Techniques: 3d CNN Integrated Inception V3 networks,international journal of Intelligent systems and applications in Engineering,2023,https://ijisae.org/index.php/IJISAE/article/view/3191/1778 |
| 4 |
Finite field arithmetic comparison over GF(P) and GF(2^m)”, 3rd International Conference on Trends in Research, Engineering and Developmental Sciences (TREnDS 2017) |
| 5 |
Published paper in NCCIE 2012 title”Design and implementation of 2D DCT architecture using shift register based transposition in FPGA” |
| Name of the Programme |
Institution |
Period |
Remarks |
| CoreEL Edusummit 2023 |
COREL |
Nov 9th |
|
| AI Trends and industry use cases -Contemporary and future |
FISAT-MCA |
25-30Septemeber 2023 |
|
| Machine learning |
Coursera |
February 2023 |
92% |
| International FDP on Microsystems Design And Control Engineering |
SAINT Gits collge of engg |
7-20 September 2020 |
|
| Five day hands on workshop on analog and digital vlsi design suing cadence tool suite |
Muthoot Institute of Technology |
3rd to 7th August 2020 |
|
| Python for all |
Coursera |
Aug 2020 |
97% |
| ASIC front end design-Methodologies using Mentor Graphics EDA tools |
Webinar-CoreEL |
15 April 2020 |
|
| Embedded System Design flow on Zyng using Vivado |
Webinar-CoreEL |
13 April 2020 |
|
| AI Programming using MATLAB |
Webinar-CoreEL |
Apr 11 2020 |
|
| FDP on introduction to Simulink |
FISAT |
26th July 2019 |
|
| Tools to aid online blended learning |
FISAT |
12th December 2018 |
|
| IOT Trends and Challenges |
FISAT |
12th December 2018 |
|
| Python programming and machine learning basic |
Sahrdaya college of Enginnering and Tech |
9th to 14th July 2018 |
|
| Robotics and IOT |
FISAT |
16th to 20th July 2018 |
|
| CMOS ,Mixed signal and Radio frequency VLSI Design |
FISAT-NMEICT,IIT Kharagpur |
30th jan to 4th feb 2017 |
|
| Power Electronics and Embedded Coding |
Dept of ECE & EIE,FISAT |
15th and 16th September 2017 |
|
| Digital Fabrication Techiniques |
FABLAB,Fisat |
14th to 15th July 2017 |
|
| 3rd international conference on trends in research,engineering and developmental sciences |
Sahrdaya college of Enginnering and Tech |
June 2017 |
Finite field arithmetic comparison over GF(P) and GF(2m) |
| Makers Workshop |
FISAT , FISAT centre for innovation incubation and entrepreneurship |
20 th July to 30th July 2016 |
|
| Workshop on Advanced LABVIEW applications and programming of beaglebone black |
FISAT,Dept of E & I |
11TH july 2016 to 15th july 2016 |
|
| Workshop on Electronic Design Tools and its application |
SOE,CUSAT |
27-05-2013 to 31-05-2013 |
|
| National conference on currents advancements in communication ,control and instrumentation engineering (NCCCIE 2012) |
FISAT |
17-05-2012 to 18-05-2012 |
Design and implementation of 2D DCT architecture using shift register based transposition in FPGA |
| Workshop on “Analog Electronics” by IIT, Kharagpur |
FISAT |
2 weeks
(4th June to 14th June 2013) |
|
| Workshop on Aakash for Education by IIT, Bombay |
FISAT |
10th & 11th November 2012 |
|
| Workshop on Research methodologies by IIT ,Bombay |
FISAT |
2nd & 9th February 2012 |
|
| One day workshop on NPTEL by IIT Madras & classie Knowledge |
FISAT |
12-12-2012 |
|
| Workshop on VLSI & ES |
Model Engineering College |
3rd & 4th March 2011 |
|
| Technical workshop marathon in coordination with IEEE on Linux & ARM processors |
Model Engineering College |
23-05-2011 to 27-05-2011 |
|
| Technical workshop marathon in coordination with IEEE on circuit simulators & DSP |
Model Engineering College |
28-05-2011 to 03-06-2011 |
|
| Technical workshop marathon in coordination with IEEE on FPGA & ASIC |
Model Engineering College |
25-06-2011 to 01-07-2011 |
|
- Btech -ECC Processor architecture using montgomery multiplication
- Mtech-Evaluation of different types of wallace tree multipliers for MAC Modules
- Mtech-Implementation of an efficient fpga based phase unwrapping architecture
- Btech:Speed montoring module
- Btech:Pothole detection and leveling
- Btech -Flood prediction system
| 1 |
Solid State Devices |
| 2 |
Network Theory |
| 3 |
Logic system design |
| 4 |
Digital System Design |
| 5 |
Embedded System Design |
| 6 |
VLSI Circuits |
| 7 |
RTOS |
| 8 |
MEMS |
| 9 |
Computer Network |
| 10 |
Computer organisation |
| 11 |
Microprocessor and Microcontrollers |
| 12 |
CMOS VLSI Design |